International Electronics Forum Speaker Abstracts

Please find below the speech titles and abstracts of our International Electronics Forum speakers:

Synopsys 

Rich Goldman

Vice President, Corporate Marketing & Strategic Alliances Chief Executive Officer, Synopsys Armenia

New Rules for the New Normal. Onward into The Age of Nano Tech! 

May you live in interesting times. A Familiar Chinese proverb, but is it a blessing or a curse? As the global economy slowly pulls itself out of a cursed time, the semiconductor world is anything but slow or boring. The ever expanding market for smart consumer devices promises a blessing of demand for IC providers. But those same markets are also driving a new normal, ruled by a curse of quality, cost and time-to-market pressures. This presentation provides a perspective on industry trends defining the new rules and design solutions that winning companies are using to drive into the age of Nano Tech.

Global Foundries

Mojy Chian

Senior Vice President, Design Services and Enablement

Enabling a Collaborative Ecosystem: Delivering a New Approach to Foundry Design Enablement

As we enter the second decade of the 21st century, the world continues to undergo a technological transformation as significant as the Industrial Revolution. Industry leaders are struggling to understand the impacts of social networking, to harness the power of cloud computing, and to determine how to best deliver on the promise of unlimited connectivity. In a competitive landscape dominated by form factors, app stores, and operating systems, the glory days of the processor wars—when silicon innovation drove each wave of new technology—would appear to be ancient history. But nothing could be further from the truth. Semiconductor manufacturing is very much at the heart of today’s technology revolution. Mobile device makers, for example, are increasingly turning to advanced process technology to squeeze greater performance and power-efficiency from their designs. This trend is being driven by the fabless industry, which relies on close collaboration with foundry partners to drive continued innovation. This presentation will consider why it is imperative for the semiconductor industry to continue delivering on the promise of technology scaling, while also examining how the entire ecosystem can work together to overcome the hurdles ahead.

imec 

Dr Lode Lauwers

Senior Director Business Development

Stronger and Broader Platforms For New Ecosystems In Nanoelectronics R&D

The era of straightforward geometrical scaling is largely behind us, but also in the next decade, our industry is striving for continued performance improvement and more power efficiency, through material-enabled scaling, novel device structures and novel substrates. The challenges to overcome are increasingly complex, and need to be addressed in a comprehensive way. 

Early technology option assessment at the system level will feed decisions to move towards new process flows and device architectures. In this, the role of foundries and fabless companies is growing, ecosystems expand, and the need to do this research in industry-relevant and cost-efficient platforms is imminent. Companies who acquire new areas of understanding are expected to be best positioned to make the differentiating products of the next generation. Novel application ideas in various areas will be developed on platforms that combine and integrate newly created technology capabilities...

Monolithic 3D 

Zvi Or-Bach

President and CEO

The Effective Alternative To Dimensional Scaling

The accelerating complexity and cost of dimensional scaling has given birth to "More than Moore", of which 3D IC is one of the leading drivers. Recent breakthroughs have added the option of practical monolithic 3D with a 10,000x higher vertical connectivity. Multiple researchers have reported the potential of 3D IC with rich vertical connectivity to provide significant average wire length reduction. In fact, some forecast that each device folding could be equivalent to one process node of dimensional scaling.

We will present several 3D IC flows with their pros and cons, and the future implications on semiconductor capital outlay strategy, manufacturing, and design.    

Mentor Graphics 

Joseph Sawicki 

Vice President & General Manager, Design-to-Silicon Division

Dual Paths Down The Cost Curve: Scaling And 3d

For the first time since the first planar integrated circuit was created at Fairchild Semiconductor in 1960, IC and system designers are faced with alternatives to reducing the cost and size, and increasing the performance of electronics products. For 50 years the natural choice was to pack more transistors on a silicon die by making transistors and interconnects smaller. While CMOS scaling appears feasible at least down to the 11nm node, both the design and manufacturing costs associated with further shrinking are high. Designers are now looking seriously at various forms of die stacking—so called “three dimensional” ICs—as an alternative to maintain improving size, power, performance, and cost curves. Mr. Sawicki will discuss the motivations and challenges associated with these two paths, scaling vs. 3D IC. What are the design and manufacturing tradeoffs? Does 3D IC change the design and manufacturing flow? Do designers need new tools and methodologies? How is the semiconductor ecosystem responding? Mr. Sawicki will provide his insight on these and other important questions.